Committee Chair

Eltom, Ahmed H.

Committee Member

Ofoli, Abdul; Kobet, Gary

Department

Dept. of Electrical Engineering

College

College of Engineering and Computer Science

Publisher

University of Tennessee at Chattanooga

Place of Publication

Chattanooga (Tenn.)

Abstract

Conventional Underfrequency Load Shedding (UFLS) is used to balance generation and load when underfrequency conditions occur. It sheds a fixed, predetermined amount of load irrespective of disturbance location. Several adaptive UFLS schemes are proposed in the literature. Recent research discussed utilizing synchrophasor messages to implement adaptive UFLS but these studies have been using virtual PMUs. Of late, hardware implementations for adaptive UFLS scheme using actual Phasor Measurement Units (PMUs) are reported but also these studies are based on small power systems. This study presents hardware implementation of adaptive UFLS based on real time simulation of IEEE39-bus system. The simulation tool used was OPAL-RT eMEGAsim real time digital simulator. To emulate the actual environment where the scheme could be used, a complete phasor network setup is established using actual devices, such as high accuracy Global Positioning System (GPS) clocks, PMUs and Synchrophasor Vector Processor (SVP). The results obtained show that the adaptive UFLS scheme restored the frequency and curtailed the load based on voltage sag. Furthermore, the results are compared with conventional UFLS scheme.

Degree

M. S.; A thesis submitted to the faculty of the University of Tennessee at Chattanooga in partial fulfillment of the requirements of the degree of Master of Science.

Date

12-2014

Subject

Electric power distribution; Electric power systems

Keyword

Underfrequency Load Shedding, Synchrophasor, Synchrophasor Vector Processor, Real Time Simulation, Hardware in the loop Test

Document Type

Masters theses

Extent

x, 77 leaves

Language

English

Rights

Under copyright.

License

http://creativecommons.org/licenses/by-nc-nd/3.0/

Share

COinS